initial: add all custom Claude.ai skills
This commit is contained in:
unavlab
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# MCU Database Schema Reference
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## Schema Definition
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```python
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MCU_DB: dict[str, dict[str, dict]] = {
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"<vendor>": {
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"<family_id>": {
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"description": str, # Human-readable family description
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"core": str, # CPU core (e.g. "Cortex-M4F", "Xtensa LX7")
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"voltage_profiles": [
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{
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"id": str, # e.g. "3v3_only", "1v8_core_3v3_io"
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"vcore": float, # Core supply voltage
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"vio": float, # I/O supply voltage
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"vbat_supported": bool,
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},
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],
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"packages": {
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"<package_id>": {
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"description": str, # e.g. "LQFP64, 10x10mm, 0.5mm pitch"
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"pin_count": int,
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"thermal_pad": bool, # QFN/DFN exposed pad
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"pinmap": {
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# int pin_number or str pin_name → pin definition
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1: {
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"signal": str, # Primary signal name
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"roles": list[str], # ["power", "ground", "reset", "boot", "gpio", "analog"]
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"af": list[str], # Alternate functions (optional)
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},
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},
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"capabilities": {
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"has_usb_fs": bool,
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"has_usb_hs": bool,
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"has_eth_mac": bool,
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"has_can": bool,
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"has_sdio": bool,
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"uart_count": int,
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"i2c_count": int,
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"spi_count": int,
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"adc_channels": int,
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"dac_channels": int,
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"timer_count": int,
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"dma_channels": int,
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# extensible — add any capability flags needed
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},
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},
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},
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},
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},
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}
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```
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## Key Design Decisions
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- **Vendor as top-level key**: Allows unambiguous lookup when family names overlap.
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- **Roles list, not single role**: A pin can be both "gpio" and "analog" (e.g. PA0 on STM32).
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- **Alternate functions (af)**: Matches STM32 AF model; for ESP32, use GPIO matrix mapping.
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- **thermal_pad flag**: Reminds the generator to add GND connection for QFN/DFN pads.
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- **Capabilities are flat**: Easier to query than nested structures. Add custom keys freely.
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## Example: ST / STM32F4 / LQFP64
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```python
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MCU_DB = {
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"ST": {
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"STM32F4": {
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"description": "High-performance Cortex-M4F, up to 180 MHz, FPU, DSP",
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"core": "Cortex-M4F",
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"voltage_profiles": [
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{"id": "3v3_only", "vcore": 3.3, "vio": 3.3, "vbat_supported": True},
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{"id": "1v8_core_3v3_io", "vcore": 1.8, "vio": 3.3, "vbat_supported": True},
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],
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"packages": {
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"LQFP64": {
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"description": "LQFP64, 10x10mm, 0.5mm pitch",
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"pin_count": 64,
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"thermal_pad": False,
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"pinmap": {
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1: {"signal": "VBAT", "roles": ["power"]},
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2: {"signal": "PC13", "roles": ["gpio"], "af": ["RTC_AF1"]},
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7: {"signal": "NRST", "roles": ["reset"]},
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60: {"signal": "BOOT0", "roles": ["boot"]},
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14: {"signal": "PA0", "roles": ["gpio", "analog"],
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"af": ["ADC1_IN0", "TIM2_CH1", "USART2_CTS"]},
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15: {"signal": "PA1", "roles": ["gpio", "analog"],
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"af": ["ADC1_IN1", "TIM2_CH2", "USART2_RTS"]},
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16: {"signal": "PA2", "roles": ["gpio", "analog"],
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"af": ["ADC1_IN2", "TIM2_CH3", "USART2_TX"]},
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17: {"signal": "PA3", "roles": ["gpio", "analog"],
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"af": ["ADC1_IN3", "TIM2_CH4", "USART2_RX"]},
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# ... fill from datasheet DS9716 Table 8
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19: {"signal": "VSS", "roles": ["ground"]},
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20: {"signal": "VDD", "roles": ["power"]},
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},
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"capabilities": {
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"has_usb_fs": True,
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"has_usb_hs": False,
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"has_eth_mac": False,
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"has_can": True,
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"has_sdio": True,
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"uart_count": 4,
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"i2c_count": 3,
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"spi_count": 3,
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"adc_channels": 16,
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"dac_channels": 2,
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"timer_count": 14,
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"dma_channels": 16,
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},
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},
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},
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},
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},
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"Espressif": {
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"ESP32-S3": {
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"description": "Dual-core Xtensa LX7, WiFi + BLE 5, AI acceleration",
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"core": "Xtensa LX7 (dual)",
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"voltage_profiles": [
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{"id": "3v3_only", "vcore": 3.3, "vio": 3.3, "vbat_supported": False},
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],
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"packages": {
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"ESP32-S3-MINI-1": {
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"description": "Module, 15.4x20.5mm, castellated pads",
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"pin_count": 55,
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"thermal_pad": True,
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"pinmap": {
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1: {"signal": "GND", "roles": ["ground"]},
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2: {"signal": "3V3", "roles": ["power"]},
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3: {"signal": "EN", "roles": ["reset"]},
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4: {"signal": "IO4", "roles": ["gpio", "analog"],
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"af": ["ADC1_CH3", "TOUCH4"]},
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5: {"signal": "IO5", "roles": ["gpio", "analog"],
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"af": ["ADC1_CH4", "TOUCH5"]},
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6: {"signal": "IO6", "roles": ["gpio", "analog"],
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"af": ["ADC1_CH5", "TOUCH6"]},
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7: {"signal": "IO7", "roles": ["gpio", "analog"],
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"af": ["ADC1_CH6", "TOUCH7"]},
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# ESP32 uses GPIO matrix — any GPIO can map to any peripheral
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# af list shows default/recommended assignments
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# ... fill from ESP32-S3-MINI-1 datasheet
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},
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"capabilities": {
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"has_usb_fs": True, # USB-OTG
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"has_usb_hs": False,
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"has_eth_mac": False,
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"has_can": True, # TWAI (CAN 2.0)
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"has_sdio": True,
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"has_wifi": True,
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"has_ble": True,
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"uart_count": 3,
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"i2c_count": 2,
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"spi_count": 3, # SPI0/SPI1 for flash; SPI2/SPI3 general
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"adc_channels": 20,
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"dac_channels": 0, # S3 has no DAC (S2 did)
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"timer_count": 4, # General-purpose timers
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"dma_channels": 5, # GDMA channels
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"gpio_matrix": True, # Any GPIO → any peripheral
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},
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},
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},
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},
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},
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}
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```
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## Blank Template
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Copy this to add a new MCU family:
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```python
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"<Vendor>": {
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"<FAMILY>": {
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"description": "",
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"core": "",
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"voltage_profiles": [
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{"id": "3v3_only", "vcore": 3.3, "vio": 3.3, "vbat_supported": False},
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],
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"packages": {
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"<PACKAGE_ID>": {
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"description": "",
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"pin_count": 0,
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"thermal_pad": False,
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"pinmap": {
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# Fill from datasheet pinout table
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},
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"capabilities": {
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"has_usb_fs": False,
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"has_usb_hs": False,
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"has_eth_mac": False,
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"has_can": False,
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"has_sdio": False,
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"uart_count": 0,
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"i2c_count": 0,
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"spi_count": 0,
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"adc_channels": 0,
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"dac_channels": 0,
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"timer_count": 0,
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"dma_channels": 0,
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},
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},
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},
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},
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},
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```
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## Validation
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Run `scripts/validate_mcu_db.py` to check:
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- All required keys present
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- Pin numbers are unique within a package
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- Every package has at least one "power" and one "ground" pin
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- Capability counts are non-negative integers
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- Voltage profiles have valid voltage ranges (0.5V–5.5V)
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@@ -0,0 +1,150 @@
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# Power Supply Design Guide
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## Topology Selection
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| Topology | When to Use | Efficiency | Noise | Cost |
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|----------|-------------|------------|-------|------|
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| **LDO** | Vdrop < 1V, Iout < 500mA, noise-sensitive | Low (η ≈ Vout/Vin) | Very low | Low |
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| **Buck** | Vdrop > 1V, Iout > 200mA, efficiency matters | High (85-95%) | Medium | Medium |
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| **Buck + LDO chain** | High Vin, multiple rails, mixed noise needs | Good overall | Low on LDO rails | Medium |
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| **Boost** | Vout > Vin (battery → 5V, etc.) | Medium (80-90%) | Medium-High | Medium |
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| **Buck-Boost** | Vin can be above or below Vout | Medium | High | High |
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| **Charge Pump** | Small current (<100mA), voltage doubling/inversion | Medium | High | Low |
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### Decision Tree
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```
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Is Vin always > Vout?
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├─ Yes → Is (Vin - Vout) < 1V AND Iout < 500mA?
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│ ├─ Yes → LDO
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│ └─ No → Is noise critical on this rail?
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│ ├─ Yes → Buck + LDO (buck for bulk, LDO for clean rail)
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│ └─ No → Buck
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└─ No → Is Vin sometimes < Vout?
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├─ Yes → Buck-Boost (or SEPIC)
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└─ No → Boost
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```
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## Input Protection
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Every power input should have:
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1. **Reverse polarity protection**: P-MOSFET (preferred) or Schottky diode (simpler, lossy)
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2. **Overvoltage / transient protection**: TVS diode rated above max operating voltage
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3. **Inrush current limiting**: NTC thermistor or soft-start IC for high-capacitance designs
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4. **Fuse**: Resettable PTC or standard fuse, rated for max expected current × 1.5
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```python
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# circuit-synth pattern: input protection block
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@circuit(name="input_protection")
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def input_protection(vin_raw, vin_protected, gnd):
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fuse = Component(symbol="Device:Fuse_Small", ref="F", value="2A",
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footprint="Fuse:Fuse_1206_3216Metric")
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tvs = Component(symbol="Diode:TVS", ref="D_TVS", value="SMBJ15A",
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footprint="Diode_SMD:D_SMA")
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cin = Component(symbol="Device:C", ref="C_IN", value="10uF",
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footprint="Capacitor_SMD:C_1206_3216Metric")
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vin_raw += fuse[1]
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fuse[2] += tvs["A"] # TVS anode to fused input
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tvs["K"] += gnd # TVS cathode to ground (unidirectional)
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vin_protected += fuse[2], cin[1]
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gnd += cin[2]
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```
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## Decoupling Strategy
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### Per-IC decoupling (mandatory)
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- **100nF ceramic (X7R/X5R, 0402 or 0603)** on every VDD pin, placed as close as possible.
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- For MCUs with VDDA (analog supply): separate 100nF + 1µF, with ferrite bead isolation.
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- For MCUs with VCAP (internal regulator output): capacitor per datasheet (typically 2.2µF).
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### Per-rail bulk capacitors
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- **10µF ceramic** per power rail (at the regulator output).
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- **100µF electrolytic/tantalum** for high-current rails (>500mA).
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### High-frequency bypass
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- **100nF + 10nF** pair for noise-sensitive analog circuits.
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- Place smaller cap closest to IC pin.
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### Layout rules
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- Capacitor → IC pin via is shorter than capacitor → pour via.
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- Ground vias under decoupling caps (direct path to ground plane).
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- Never route high-speed signals under/near switching regulators.
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## Common Regulator Reference Circuits
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### LDO: AMS1117-3.3 (SOT-223)
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```python
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@circuit(name="ldo_3v3")
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def ldo_3v3(vin, vout_3v3, gnd):
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reg = Component(symbol="Regulator_Linear:AMS1117-3.3", ref="U_LDO",
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footprint="Package_TO_SOT_SMD:SOT-223-3_TabPin2")
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cin = Component(symbol="Device:C", ref="C_LDO_IN", value="10uF",
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footprint="Capacitor_SMD:C_0805_2012Metric")
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cout = Component(symbol="Device:C", ref="C_LDO_OUT", value="22uF",
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footprint="Capacitor_SMD:C_0805_2012Metric")
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vin += reg["VI"], cin[1]
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vout_3v3 += reg["VO"], cout[1]
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gnd += reg["GND"], cin[2], cout[2]
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```
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### Buck: TPS54331 (SOIC-8) — 3A, 3.5-28V input
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```python
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@circuit(name="buck_5v")
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def buck_5v(vin, vout_5v, gnd):
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buck = Component(symbol="Regulator_Switching:TPS54331", ref="U_BUCK",
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footprint="Package_SO:SOIC-8_3.9x4.9mm_P1.27mm")
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inductor = Component(symbol="Device:L", ref="L_BUCK", value="15uH",
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footprint="Inductor_SMD:L_1210_3225Metric")
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diode = Component(symbol="Diode:SS34", ref="D_BUCK",
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footprint="Diode_SMD:D_SMA")
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# Feedback resistors, bootstrap cap, input/output caps...
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# (Complete circuit depends on exact target voltage)
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vin += buck["VIN"]
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buck["GND"] += gnd
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buck["PH"] += inductor[1], diode["K"]
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inductor[2] += vout_5v
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diode["A"] += gnd
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```
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## Multi-Rail Design Patterns
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### Pattern: 12V → 5V (Buck) → 3.3V (LDO) → 1.8V (LDO)
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Good for: general-purpose MCU boards, moderate current.
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```
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VIN_12V ──→ [Buck] ──→ 5V rail (1A)
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├──→ [LDO] ──→ 3.3V rail (500mA)
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│ └──→ MCU VDD, peripherals
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└──→ [LDO] ──→ 1.8V rail (200mA)
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└──→ MCU VCORE (if separate)
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```
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### Pattern: USB 5V → 3.3V (LDO)
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Good for: simple USB-powered devices.
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```
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USB_VBUS ──→ [Fuse 500mA] ──→ [LDO] ──→ 3.3V
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```
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### Pattern: Battery (3.0-4.2V) → 3.3V (Buck-Boost or LDO)
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Good for: battery-powered IoT. LDO if battery always > 3.5V; buck-boost otherwise.
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## Thermal Considerations
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- Calculate power dissipation: `P = (Vin - Vout) × Iout` for LDO
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- Check junction temperature: `Tj = Ta + P × θja`
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- SOT-223 θja ≈ 65°C/W; SOIC-8 ≈ 125°C/W; QFN exposed pad ≈ 35°C/W
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- If Tj > 125°C at max load → need larger package or switch to buck
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@@ -0,0 +1,115 @@
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# Review Checklists
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## 1. Schematic Review Checklist
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Walk through every item. Mark each as PASS / FAIL / N/A.
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||||
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||||
### Power
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||||
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||||
- [ ] Every VDD/AVDD/VDDIO pin has a dedicated 100nF decoupling cap (placed close)
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- [ ] Bulk capacitor (10µF+) present on each power rail at regulator output
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- [ ] VDDA isolated with ferrite bead + dedicated caps (if MCU has analog supply)
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- [ ] VCAP pin has capacitor per datasheet value (STM32 specific)
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- [ ] All GND pins connected (including exposed thermal pad on QFN/DFN)
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- [ ] Power sequencing considered for multi-rail designs
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- [ ] Regulator input/output caps meet datasheet ESR requirements
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- [ ] Input protection present (TVS, fuse, reverse polarity) if external power
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||||
- [ ] USB VBUS has resettable fuse (500mA for device, per USB spec)
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- [ ] Battery circuit has undervoltage lockout if applicable
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||||
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### Reset & Boot
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||||
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||||
- [ ] NRST has 100nF cap to GND (RC filter for noise rejection)
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- [ ] NRST has external pull-up (10kΩ typical) if not using reset IC
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- [ ] BOOT0 pin pulled to defined state (typically GND via 10kΩ)
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- [ ] BOOT1/other boot config pins at correct state for normal operation
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- [ ] ESP32 EN pin: 10kΩ pull-up + 1µF cap (slow rise for reliable boot)
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- [ ] ESP32 GPIO0: pull-up for normal boot, button to GND for programming
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### Clock
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||||
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- [ ] Crystal load capacitors calculated from datasheet formula:
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`CL = (C1 × C2) / (C1 + C2) + Cstray`, where Cstray ≈ 3-5pF
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||||
- [ ] Crystal placed close to MCU oscillator pins (< 10mm trace length)
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- [ ] Ground guard ring / pour around crystal area (EMI reduction)
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- [ ] 32.768 kHz RTC crystal present if RTC needed (with its own load caps)
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||||
### Signal Integrity
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||||
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||||
- [ ] USB D+/D- have ESD protection diodes (TPD2E001, PRTR5V0U2X, or similar)
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- [ ] USB D+/D- traces are 90Ω differential impedance (controlled, matched length)
|
||||
- [ ] I2C bus has external pull-up resistors (4.7kΩ default; 2.2kΩ for fast-mode+)
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||||
- [ ] SPI chip-select lines have pull-ups (prevent floating during boot)
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||||
- [ ] UART TX/RX: series resistor (22-100Ω) if crossing board boundaries
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- [ ] High-speed signals (>10 MHz) have series termination resistors
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||||
- [ ] CAN bus: 120Ω termination resistor at each end of bus
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||||
- [ ] Analog inputs: RC low-pass filter if reading noisy signals
|
||||
|
||||
### GPIO & Unused Pins
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||||
|
||||
- [ ] No floating input pins (all unused GPIO tied high/low or set as output)
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||||
- [ ] LED current-limiting resistors present and correctly calculated
|
||||
- [ ] Button/switch inputs have debounce circuit (RC or software)
|
||||
- [ ] Test points on critical signals (power rails, I2C, SPI, UART)
|
||||
|
||||
### Connectors
|
||||
|
||||
- [ ] Programming/debug header present (SWD for ARM, JTAG if needed)
|
||||
- [ ] USB connector shield connected to GND (directly or via 1MΩ + 4.7nF)
|
||||
- [ ] All connector pins assigned and documented
|
||||
- [ ] Mechanical mounting holes present (M3 at corners, connected to GND or float)
|
||||
|
||||
## 2. DRC/ERC Checklist (pre-KiCad)
|
||||
|
||||
These should be verified in the Python code before generating KiCad files:
|
||||
|
||||
- [ ] Every `Component` has `symbol`, `ref`, and `footprint` defined
|
||||
- [ ] No duplicate reference designators (R1, R1 conflict)
|
||||
- [ ] Every net has at least two connections (no dangling nets)
|
||||
- [ ] Power nets (VCC, GND) are explicitly named and consistent
|
||||
- [ ] No unconnected component pins that should be connected
|
||||
- [ ] Component values are specified where needed (resistors, capacitors)
|
||||
|
||||
Post-KiCad-generation (in KiCad ERC):
|
||||
|
||||
- [ ] Run ERC in KiCad schematic editor — zero errors
|
||||
- [ ] Run DRC in KiCad PCB editor — zero errors
|
||||
- [ ] Check for unconnected pads in PCB
|
||||
- [ ] Verify copper pour connectivity (GND plane continuous)
|
||||
|
||||
## 3. BOM Review Checklist
|
||||
|
||||
- [ ] All components have manufacturer part number (MPN) or generic value
|
||||
- [ ] All components have valid KiCad footprint assigned
|
||||
- [ ] No DNP (Do Not Place) components without documented reason
|
||||
- [ ] Passive component values are standard E-series (E12/E24/E96)
|
||||
- [ ] Capacitor dielectric specified (X7R/X5R for decoupling, C0G for precision)
|
||||
- [ ] Capacitor voltage rating ≥ 2× operating voltage (derating)
|
||||
- [ ] Resistor power rating adequate for application
|
||||
- [ ] Check JLCPCB basic parts availability (cost optimization)
|
||||
- [ ] Second-source alternatives identified for critical components
|
||||
- [ ] Total unique part count minimized (fewer unique values = cheaper assembly)
|
||||
|
||||
## 4. Manufacturing Review (pre-Gerber)
|
||||
|
||||
- [ ] Board outline defined with correct dimensions
|
||||
- [ ] Minimum trace width / spacing meets fab capability (typically 0.15mm/0.15mm)
|
||||
- [ ] Via size meets fab capability (typically 0.3mm drill, 0.6mm annular ring)
|
||||
- [ ] Silkscreen text readable (min 0.8mm height, 0.15mm line width)
|
||||
- [ ] Component courtyard clearances respected (no overlaps)
|
||||
- [ ] Fiducial marks present if using pick-and-place assembly
|
||||
- [ ] Panel design considered if small board (add mouse bites / V-score lines)
|
||||
|
||||
## How to Use These Checklists
|
||||
|
||||
When generating or reviewing a circuit:
|
||||
|
||||
1. Complete the **Schematic Review** after writing all Python circuit files.
|
||||
2. Run **DRC/ERC** checks both in Python (structural) and in KiCad (electrical).
|
||||
3. Do **BOM Review** after `generate_bom()`.
|
||||
4. Do **Manufacturing Review** after PCB layout, before generating Gerber files.
|
||||
|
||||
Report findings as:
|
||||
- 🔴 **CRITICAL**: Must fix before fabrication (missing decoupling, floating pins, wrong voltage)
|
||||
- 🟡 **WARNING**: Should fix, risk of intermittent issues (marginal thermal, no test points)
|
||||
- 🟢 **SUGGESTION**: Nice to have, improves robustness (second-source parts, extra test points)
|
||||
Reference in New Issue
Block a user